With the continuous development of liquid crystal display (LCD) technology, the requirement of the components in the liquid crystal display is getting higher and higher.
The package structure of the chips on film (COF) of the prior art adopted the technology of the tape automated bonding (TAB) to heat and package driver chips, the driver chips are taped and delivered in a roil form. In operation, each of the COF package can be cut off in turn from the tape substrate, and electrically connected between a driving circuit board and a transparent circuit on a glass substrate of the liquid crystal panel. One or a plurality of COF packages can be provide between the driving circuit board and the transparent circuit. When the size of the liquid crystal panel is larger, the amount of the COF packages is more.
For example, referring to FIG. 1, FIG. 1 is a schematic view of a traditional liquid crystal display. The liquid crystal display comprises a driving circuit board 11, a LCD panel 13 and a plurality of chip tapes 12.
The chip tapes 12 are provided between the LCD panel 13 and the driving circuit board 11 to achieve the electrical signal conduction between the LCD panel 13 and the driving circuit board 11. With the technical requirements for high-resolution, the amount of the chip tapes 12 is more and more for driving liquid crystal panel, so that the chip tapes 12 are densely arranged on the source gate of the liquid crystal panel. For example, in FIG. 1, the chip tapes 12 are densely arranged along the extending direction of the driving circuit board 11, i.e. a transverse direction M′, Mechanical design is thus restricted by numerous chip tapes 12, for example, the distribution of the mounting screws. In this case, the width of the terminals of the chip tapes 12 are limited by process, the bonding of the chip tapes 12 will be a problem and a bottleneck of developing the ultra-high-definition LCD panel.
Therefore, it is one of the research directions in the field of LCD panel technology to think how to reduce the occupied space of the chip tapes 12 along the transverse direction M′ when the number of the chip tapes 12 are the same, in order to save the space for welding the chip tapes 12.